Design for Testability of Integrated Circuits and Project Protection Difficulties
Design solutions of domestic VLSI were obtained as a result of the application of computeraided design tools of a foreign supplier (CAD Synopsys, Cadence Design Systems and Mentor Graphics), based on standard libraries of PDK elements (Project Design KIT) of factories and IC-modules also supplied ma...
| Main Authors: | , , |
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| Format: | Article |
| Language: | Russian |
| Published: |
MIREA - Russian Technological University
2019-08-01
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| Series: | Российский технологический журнал |
| Subjects: | |
| Online Access: | https://www.rtj-mirea.ru/jour/article/view/164 |