Superjunction LDMOS With Dual Gate for Low On-Resistance and High Transconductance

Superjunction LDMOS With Dual Gate for Low On-Resistance and High Transconductance

In this paper, a novel bulk silicon lateral superjunction double diffused MOSFET (SJ-LDMOS) with dual gate (DG) is proposed and its mechanism is investigated by numerical TCAD simulations. The proposed structure features the combination of a trench gate and a planar gate, forming two current conduct...

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Bibliographic Details
Main Authors: Zhen Cao, Licheng Jiao
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Superjunction MOSFET
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trench gate
breakdown voltage
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Online Access:https://ieeexplore.ieee.org/document/9148601/

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https://ieeexplore.ieee.org/document/9148601/

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