An Area-Efficient and Programmable 4 × 25-to-28.9 Gb/s Optical Receiver with DCOC in 0.13 µm SiGe BiCMOS

An Area-Efficient and Programmable 4 × 25-to-28.9 Gb/s Optical Receiver with DCOC in 0.13 µm SiGe BiCMOS

In this paper, we present an area-efficient noise-optimized programmable 4 × 25-to-28.9 Gb/s optical receiver. Both high- and low-power modes are available for the receiver to meet different requirements. Emitter degeneration provides the input transimpedance amplifier (TIA) stage with improved stab...

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Bibliographic Details
Main Authors: Haojie Xu, Jiarui Liu, Zhiyu Wang, Min Zhou, Jiongjiong Mo, Faxin Yu
Format: Article
Language:English
Published: MDPI AG 2020-06-01
Series:Electronics
Subjects:
4 × 25-to-28.9 Gb/s
parasitic capacitors utilization
programmable
area-efficient
noise optimization
improved stability
Online Access:https://www.mdpi.com/2079-9292/9/6/1032

Internet

https://www.mdpi.com/2079-9292/9/6/1032

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