| Summary: | In this paper, we proposed a novel structure enabling the low voltage operation of three-dimensional (3D) NAND flash memory. The proposed structure has a ferroelectric thin film just beneath the control gate, where the inserted ferroelectric material is assumed to have two stable polarization states. A voltage for ferroelectric polarization (V<sub>PF</sub>) that is lower than the program or erase voltage is used to toggle the polarization state of the ferroelectric thin film, whose impact on the channel potential profile is analyzed to optimize operation voltage reduction. The channel potential of select word line (WL), where the natural local self-boosting (NLSB) effect occurs, increases due to the polarization state. Model parameters for the ferroelectric thin film of 8 nm are fixed to 15 µC/cm<sup>2</sup> for remanent polarization (P<sub>r</sub>), 30 µC/cm<sup>2</sup> for saturation polarization (P<sub>s</sub>), and 2 MV/cm for coercive field (E<sub>c</sub>). Within our simulation conditions, a program voltage (V<sub>PGM</sub>) reduction from 18 V to 14 V is obtained.
|
|---|
