Global Scheduling Heuristics for Multicore Architecture

Global Scheduling Heuristics for Multicore Architecture

This work discusses various compiler level global scheduling techniques for multicore processors. The main contribution of the work is to delegate the job of exploiting fine grained parallelism to the compiler, thereby reducing the hardware overhead and the programming complexity. This goal is achie...

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Main Authors: D. C. Kiran, S. Gurunarayanan, Janardan Prasad Misra, Abhijeet Nawal
Format: Article
Language:English
Published: Hindawi Limited 2015-01-01
Series:Scientific Programming
Online Access:http://dx.doi.org/10.1155/2015/860891
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spelling doaj-e36c26cd9f9044af89c2933a224dbbd52021-07-02T10:29:39ZengHindawi LimitedScientific Programming1058-92441875-919X2015-01-01201510.1155/2015/860891860891Global Scheduling Heuristics for Multicore ArchitectureD. C. Kiran0S. Gurunarayanan1Janardan Prasad Misra2Abhijeet Nawal3Department of Computer Science and Information Systems, Birla Institute of Technology and Science Pilani, Rajasthan 333031, IndiaDepartment of Electrical Electronics and Instrumentation, Birla Institute of Technology and Science Pilani, Rajasthan 333031, IndiaDepartment of Computer Science and Information Systems, Birla Institute of Technology and Science Pilani, Rajasthan 333031, IndiaOracle India Pvt. Ltd., Bangalore, Karnataka 560076, IndiaThis work discusses various compiler level global scheduling techniques for multicore processors. The main contribution of the work is to delegate the job of exploiting fine grained parallelism to the compiler, thereby reducing the hardware overhead and the programming complexity. This goal is achieved by decomposing a sequential program into multiple subblocks and constructing subblock dependency graph (SDG). The proposed schedulers select subblocks from the SDG and schedules it on different cores, by ensuring the correct order of execution of subblocks. In conjunction with parallelization techniques, locality optimizations are performed to minimize communication overhead between the cores. The results observed are indicative of better and balanced speed-up per watt.http://dx.doi.org/10.1155/2015/860891
collection DOAJ
language English
format Article
sources DOAJ
author D. C. Kiran
S. Gurunarayanan
Janardan Prasad Misra
Abhijeet Nawal
spellingShingle D. C. Kiran
S. Gurunarayanan
Janardan Prasad Misra
Abhijeet Nawal
Global Scheduling Heuristics for Multicore Architecture
Scientific Programming
author_facet D. C. Kiran
S. Gurunarayanan
Janardan Prasad Misra
Abhijeet Nawal
author_sort D. C. Kiran
title Global Scheduling Heuristics for Multicore Architecture
title_short Global Scheduling Heuristics for Multicore Architecture
title_full Global Scheduling Heuristics for Multicore Architecture
title_fullStr Global Scheduling Heuristics for Multicore Architecture
title_full_unstemmed Global Scheduling Heuristics for Multicore Architecture
title_sort global scheduling heuristics for multicore architecture
publisher Hindawi Limited
series Scientific Programming
issn 1058-9244
1875-919X
publishDate 2015-01-01
description This work discusses various compiler level global scheduling techniques for multicore processors. The main contribution of the work is to delegate the job of exploiting fine grained parallelism to the compiler, thereby reducing the hardware overhead and the programming complexity. This goal is achieved by decomposing a sequential program into multiple subblocks and constructing subblock dependency graph (SDG). The proposed schedulers select subblocks from the SDG and schedules it on different cores, by ensuring the correct order of execution of subblocks. In conjunction with parallelization techniques, locality optimizations are performed to minimize communication overhead between the cores. The results observed are indicative of better and balanced speed-up per watt.
url http://dx.doi.org/10.1155/2015/860891
work_keys_str_mv AT dckiran globalschedulingheuristicsformulticorearchitecture
AT sgurunarayanan globalschedulingheuristicsformulticorearchitecture
AT janardanprasadmisra globalschedulingheuristicsformulticorearchitecture
AT abhijeetnawal globalschedulingheuristicsformulticorearchitecture
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