Modeling reliability in copper/low-k interconnects and variability in cmos

Modeling reliability in copper/low-k interconnects and variability in cmos

The impact of physical design characteristics on backend dielectric reliability was modeled. The impact of different interconnect geometries on backend low-k time dependent dielectric breakdown was reported and modeled. Physical design parameters that are crucial to backend dielectric reliability w...

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Bibliographic Details
Main Author: Bashir, Muhammad Muqarrab
Published: Georgia Institute of Technology 2011
Subjects:
Weibull
Copper interconnects
Low-k TDDB
Dielectric breakdown
Interconnect reliability
Low-k dielectrics
CMOS variation
Systematic variation
Random variation
With-die variation
System reliability
Chip reliability
Weibull distribution
Breakdown (Electricity)
Integrated circuits
Online Access:http://hdl.handle.net/1853/41092

Internet

http://hdl.handle.net/1853/41092

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