Placement for fast and reliable through-silicon-via (TSV) based 3D-IC layouts

The objective of this research is to explore the feasibility of addressing the major performance and reliability problems or issues, such as wirelength, stress-induced carrier mobility variation, temperature, and quality trade-offs, found in three-dimensional integrated circuits (3D ICs) that use th...

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Bibliographic Details
Main Author: Athikulwongse, Krit
Published: Georgia Institute of Technology 2013
Subjects:
TSV
Online Access:http://hdl.handle.net/1853/45783