Delay optimization for critical paths on a CMOS digital I. C.
碩士 === 國立臺灣科技大學 === 工程技術研究所 === 78 ===
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| Language: | zh-TW |
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1990
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| Online Access: | http://ndltd.ncl.edu.tw/handle/01633244494305382346 |
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ndltd-TW-078NTUS2027423 |
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ndltd-TW-078NTUS20274232016-07-27T04:14:35Z http://ndltd.ncl.edu.tw/handle/01633244494305382346 Delay optimization for critical paths on a CMOS digital I. C. CMOS數位積體電路之關鍵路徑延遲時間最佳化 范原銘 碩士 國立臺灣科技大學 工程技術研究所 78 SHI, YAN-XIANG 吳傳嘉 1990 學位論文 ; thesis 0 zh-TW |
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NDLTD |
| language |
zh-TW |
| format |
Others
|
| sources |
NDLTD |
| description |
碩士 === 國立臺灣科技大學 === 工程技術研究所 === 78 ===
|
| author2 |
SHI, YAN-XIANG |
| author_facet |
SHI, YAN-XIANG 范原銘 |
| author |
范原銘 |
| spellingShingle |
范原銘 Delay optimization for critical paths on a CMOS digital I. C. |
| author_sort |
范原銘 |
| title |
Delay optimization for critical paths on a CMOS digital I. C. |
| title_short |
Delay optimization for critical paths on a CMOS digital I. C. |
| title_full |
Delay optimization for critical paths on a CMOS digital I. C. |
| title_fullStr |
Delay optimization for critical paths on a CMOS digital I. C. |
| title_full_unstemmed |
Delay optimization for critical paths on a CMOS digital I. C. |
| title_sort |
delay optimization for critical paths on a cmos digital i. c. |
| publishDate |
1990 |
| url |
http://ndltd.ncl.edu.tw/handle/01633244494305382346 |
| work_keys_str_mv |
AT fànyuánmíng delayoptimizationforcriticalpathsonacmosdigitalic AT fànyuánmíng cmosshùwèijītǐdiànlùzhīguānjiànlùjìngyánchíshíjiānzuìjiāhuà |
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1718363250974785536 |