Back gate bias effect on the subthreshold behavior and the switching performance in an ultra-thin SOI CMOS inverter operating at 77K

Back gate bias effect on the subthreshold behavior and the switching performance in an ultra-thin SOI CMOS inverter operating at 77K

碩士 === 國立臺灣大學 === 電機工程研究所 === 80 ===

Bibliographic Details
Main Authors: LI, WEI-JUN, 李偉儁
Other Authors: GUO, ZHENG-BANG
Format: Others
Language:en_US
Published: 1992
Online Access:http://ndltd.ncl.edu.tw/handle/34440469791188608296
id ndltd-TW-080NTU02442035
record_format oai_dc
spelling ndltd-TW-080NTU024420352015-10-13T14:20:28Z http://ndltd.ncl.edu.tw/handle/34440469791188608296 Back gate bias effect on the subthreshold behavior and the switching performance in an ultra-thin SOI CMOS inverter operating at 77K 工作於77K之超薄絕緣體上矽金氧半反相器的後閘極偏壓對次臨界區以及暫態響應之影響 LI, WEI-JUN 李偉儁 碩士 國立臺灣大學 電機工程研究所 80 GUO, ZHENG-BANG 郭正邦 1992 學位論文 ; thesis 41 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 碩士 === 國立臺灣大學 === 電機工程研究所 === 80 ===
author2 GUO, ZHENG-BANG
author_facet GUO, ZHENG-BANG
LI, WEI-JUN
李偉儁
author LI, WEI-JUN
李偉儁
spellingShingle LI, WEI-JUN
李偉儁
Back gate bias effect on the subthreshold behavior and the switching performance in an ultra-thin SOI CMOS inverter operating at 77K
author_sort LI, WEI-JUN
title Back gate bias effect on the subthreshold behavior and the switching performance in an ultra-thin SOI CMOS inverter operating at 77K
title_short Back gate bias effect on the subthreshold behavior and the switching performance in an ultra-thin SOI CMOS inverter operating at 77K
title_full Back gate bias effect on the subthreshold behavior and the switching performance in an ultra-thin SOI CMOS inverter operating at 77K
title_fullStr Back gate bias effect on the subthreshold behavior and the switching performance in an ultra-thin SOI CMOS inverter operating at 77K
title_full_unstemmed Back gate bias effect on the subthreshold behavior and the switching performance in an ultra-thin SOI CMOS inverter operating at 77K
title_sort back gate bias effect on the subthreshold behavior and the switching performance in an ultra-thin soi cmos inverter operating at 77k
publishDate 1992
url http://ndltd.ncl.edu.tw/handle/34440469791188608296
work_keys_str_mv AT liweijun backgatebiaseffectonthesubthresholdbehaviorandtheswitchingperformanceinanultrathinsoicmosinverteroperatingat77k
AT lǐwěijùn backgatebiaseffectonthesubthresholdbehaviorandtheswitchingperformanceinanultrathinsoicmosinverteroperatingat77k
AT liweijun gōngzuòyú77kzhīchāobáojuéyuántǐshàngxìjīnyǎngbànfǎnxiāngqìdehòuzhájípiānyāduìcìlínjièqūyǐjízàntàixiǎngyīngzhīyǐngxiǎng
AT lǐwěijùn gōngzuòyú77kzhīchāobáojuéyuántǐshàngxìjīnyǎngbànfǎnxiāngqìdehòuzhájípiānyāduìcìlínjièqūyǐjízàntàixiǎngyīngzhīyǐngxiǎng
_version_ 1717752923807547392

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