Design of a Mixed Signal Analog-Digital Simulator for CMOS VLSI Circuits

碩士 === 國立交通大學 === 電子研究所 === 81 === The mixed-mode simulator is currently one of the most efficit tools for timing verification of analog-digital CMOS VLSI circuits. We have developed a mixed-mode simulator by combining the conventi...

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Bibliographic Details
Main Authors: Jony Shiang Lin Bie, 白祥麟
Other Authors: Steve S.Chung
Format: Others
Language:en_US
Published: 1993
Online Access:http://ndltd.ncl.edu.tw/handle/63874370076687970747