The Design and Implementation of a Concurrent Video Signal Processor

• Main Authors: Chen, Chih-Chin, 陳志卿
• Other Authors: Jen Chein-Wei
• Format: Others
• Language: zh-TW
• Published: 1996
• Online Access: http://ndltd.ncl.edu.tw/handle/32120475189761869698

碩士 === 國立交通大學 === 電子研究所 === 84 === The video signal processor (VSP) is very suitable for various video standards and provides high flexibility for system development. In order to offer highthroughput and hardware efficiency, we propose a concurrent VSP architecture. Our VSP contains three vector function units that work in parallel. The threevector function units include the arithmetic unit, the multiplier unit andDCT/IDCT unit which adopt vector-pipeline architecture to increase thethroughput and reduce the clock cycle time. There are six on-chip memorymodules to support the data bandwidth for the vector function units and reducethe I/O traffic. A scalar processing unit is employed to process the scalarinstructions that set parameters and control program flow. To take the fulladvantages of the parallel function units, we design a concurrent control unitwhich eliminates hazards and schedules instructions. The control unit uses thetechniques of reservation stations, renaming buffer, out-of-order executionand in-order completion. With these design considerations, our VSP can encodereal time full-CIF H.261 video in the Verilog simulation. Because of thecomplexity of our VSP, we also verify the design on Xilinx XC4010 FPGA devices.The test results from the logic analyzer show the function correctness.