Parallel ADI Algorithms on the MICA Architecture

• Main Authors: Wang, Jong Rong, 王忠榮
• Other Authors: Yuh-Dauh
• Format: Others
• Language: zh-TW
• Published: 1997
• Online Access: http://ndltd.ncl.edu.tw/handle/68057485778767136108

碩士 === 國立臺灣大學 === 資訊工程學系 === 85 === Many important scientific and engineering problems reduce to solving partial-differential equations. The first order partial-differential equation is a trivial problem for us because its finite difference leads to a tridiagonal system. The second order partial differential equation, unfortunately, does not yield a tridiagonal system directly. However, if we apply the Alternating Direction Implicit (ADI) algorithm, we can decompose the second order partial differential equation into two tridiagonal systems and the computation time can be reduced considerably. In solving ADI on a parallel architecture, we would like to choose an architecture that fits the algorithm, since it is a problem known to pose difficulties for many architectures. Instead of static architectures, such as hypercube, mesh or tree, another flexible architecture, Mapped Interconnection-Cached Architecture (MICA), has been introduced by Lyuu and Schenfeld. The architecture combines large reconfigurable networks and small, fast crossbar switches called interconnection caches. A reconfigurable network is one whose topology can be altered to suit the desired communication pattern if needed. Hence the most important improvement of the architecture is that it minimizes the movement of packets and can scale to thousands of processing elements (PEs).