The Construction of Imaging Circuit for Efficient VLSI Circuit Verification
碩士 === 國立中正大學 === 資訊工程研究所 === 88 === To prevent those design errors to occur, it has become popular to use the equivalence checker to verify if the functionally of new implementation is the same as the previous version so as to protest designers from economic losses due to undiscovered bugs. Althoug...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/31443199362022913588 |