VLSI Implementation and IP Design for Advanced Encryption Standard
碩士 === 國立東華大學 === 資訊工程學系 === 89 === In this thesis, a novel VLSI architecture of the block cipher, Rijndael, for data encryption has been presented. This cipher works on blocks of NBx8 bytes, for NB between 4 and 6. In this implementation, we decided to work with NB=4. The blocks are therefore 128bi...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/69401786392648202457 |