8Gbps Serial Link Transmitter with Adaptive Termination Resistors and Pre-Emphasis

• Main Authors: Chih-Ning Chen, 陳志寧
• Other Authors: Shyh-Jye Jou
• Format: Others
• Language: en_US
• Published: 2004
• Online Access: http://ndltd.ncl.edu.tw/handle/27075278170621995607

碩士 === 國立中央大學 === 電機工程研究所 === 92 === Due to the increasing requirement of multimedia applications, the demand for data transmission bandwidth is increased. It is very efficient to make the use of low cost coaxial cable for high-speed link transmitting.In this thesis, we will implement a parallel scrambler and a high-speed serial link transmitter with adaptive termination resistors and pre-emphasis. A very systematic parallel scrambler design methodology and architecture is proposed to overcome the limitation of serial scrambler. A new XOR-DET-C2MOS cell is proposed to speed up the operation speed of the parallel scrambler. Measurement results show that 40Gbps parallel scrambler with 16 outputs can be achieved by using 0.18um CMOS process. We also propose a digital approach of adaptive termination resistors and architecture in the transmitter. It can match the characteristic impedance of coaxial cable automatically from 75Ω~45Ω to reduce the reflection caused by the mismatch of impedance. Moreover, the architecture of pre-emphasis is improved to make the method of tuning pre-emphasis current more easy. The transmitter with pre-emphasis can handle coaxial cable length from 1-meter to 15-meter. The performance of transmitting data at 8Gbps over the 5-meter coaxial cable is achieved. The overall circuit is implemented in TSMC 0.18um 1P6M process.