Interface Circuit Design for Globally-Asynchronous Locally-Synchronous Systems and Its Application to Fast Fourier Transform Architecture
碩士 === 國立交通大學 === 電子工程系所 === 93 === The interface circuit designs using handshake protocols and asynchronous first-in-first-out (FIFO) for globally-asynchronous locally-synchronous (GALS) systems are realized and apply to the Fast Fourier Transform Architecture in this thesis. A new pausible clock c...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2005
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| Online Access: | http://ndltd.ncl.edu.tw/handle/06667869846947041294 |