Study on a Generic Decoder Architecture for Irregular LDPC codes
碩士 === 國立臺灣大學 === 電子工程學研究所 === 93 === In this paper, we propose a reconfigurable decoder architecture suitable for generic irregular LDPC (Low Density Parity Check) decoding. First of all, we study LDPC property in detail. Secondly, we survey the LDPC various decoding algorithms and propose an archi...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2005
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Online Access: | http://ndltd.ncl.edu.tw/handle/05636232778710555513 |