Capacity Determination Model with Time Constraints and Batch Processing in Semiconductor Wafer Fabrication
碩士 === 國立交通大學 === 管理學院碩士在職專班工業工程與管理組 === 94 === Recently, wafer fabrication has become more complicated and lengthened the produRct queue time. To ensure final product yield, engineers need to set up queue time limits for particular machines during wafer processing; we name it as “time constraints”....
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/14449766467328012887 |