On-Chip Bus Architecture Synthesis for SoC Design
碩士 === 國立臺灣大學 === 資訊工程學研究所 === 94 === On SoC platforms, subsystems are connected by buses on a single chip. Unlike traditional bus architecture on PCB, the bus architecture on SoC has dramatic performance effect and cost concerns. In addition, the bus architecture can now be customized for each cust...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/49214384028279795369 |