Two-Terminal Nets Routing Algorithms on Printed Circuit Boards
碩士 === 國立臺北大學 === 通訊工程研究所 === 97 === In the physical design cycle for very large scale integration (VLSI), there is several stage should be discussed such as partitioning, floor planning & placement, routing, compaction, extraction & verification. The part of routing is one of the major issu...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/73193763203410070685 |