The Design and Verification of a Cache System IP Compatible with ARM922T Architecture
碩士 === 國立臺灣科技大學 === 電子工程系 === 95 === Cache is very important part in processor performance, in this thesis, a cache system compatible to ARM922T architecture and controlled by the Proto-ARM922 system coprocessor is proposed. Through this cache system, the bus access time for the processor is dramati...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/43179437067065698710 |