Design of a FPGA-based Digital Relay for Anti-islanding Protection

碩士 === 國立臺灣科技大學 === 電機工程系 === 95 === This thesis presents the development of a FPGA-based SOC islanding relay for wind power generation system with islanding detection functions. In software, we use the latest detection algorithms to design IP of islanding relay, such as over/under voltage, over cur...

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Bibliographic Details
Main Authors: Chien-Yu Chen, 陳建宇
Other Authors: Jyh-Cherng Gu
Format: Others
Language:zh-TW
Published: 2007
Online Access:http://ndltd.ncl.edu.tw/handle/27bvau
Description
Summary:碩士 === 國立臺灣科技大學 === 電機工程系 === 95 === This thesis presents the development of a FPGA-based SOC islanding relay for wind power generation system with islanding detection functions. In software, we use the latest detection algorithms to design IP of islanding relay, such as over/under voltage, over current, over/under frequency, rate of change of frequency and vector jump. Also using ModelSim to simulate the action of the relay IP that ensure the accuracy of the timing and function. In hardware, the major tasks are develop an A/D converter and peripheral controller IP. Finally, To setup a prototype FPGA-based islanding relay by integrating all of the IP cores. This thesis also follows the latest standard to simulate the testing circuit under islanding operation by using Matlab/Simulink. According to the testing steps, we can get the waveform of voltage and current of the PCC,and sending the waveform to the Double relay tester in order. Then, Double will transform input data into digital signal that FPGA-based relay can asscept. Finally, we verify the performance of the relay and accomplish the development of the FPGA-based islanding relay.