| Summary: | 碩士 === 國立交通大學 === 資訊科學與工程研究所 === 96 === As the VLSI manufacturing technology advances to the Very Deep Submicron(VDSM) era, the device feature size shrinks and the minimum separation between two wires of the same layer is getting closer. The bad-quality routing of a long wire produces excessive delay. Therefore, avoiding crosstalk for high-speed VLSI design is of growing importance. However, it is complicated and inefficient to solve the problem in conventional two-stage flow. The difficulty of minimizing crosstalk during global routing is that nets have no track information at this stage, and detailed routing is a time-consuming task. Therefore, the track assignment, an intermediate stage between global and detailed routing, is incorporated with the routing flow.
This work will focus on gridless routing system, and integrate an efficient crosstalk-driven routing system, including a congestion-driven global router, a crosstalk-driven TA (GTA) and enhanced NEMO with fast PMT extraction.
Experimental results show that the three stage routing is faster than the two stage routing on gridless system. In addition, a crosstalk-driven gridless track assignment will reduce crosstalk and receive a better routing result.
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