Design and Implementation All-Digital Pulse-Width Control Loop
碩士 === 長庚大學 === 電子工程學研究所 === 97 === The development of the integrated circuit moves toward the system-on-a-chip (SOC) design because the digital circuit is easy for integration. Two all-digital pulse width controlled loops (ADPWCLs) are proposed to control the duty cycle of output clock signal for t...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Published: |
2009
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/14261067561170366017 |