Low Power Clock Gating in High Level Synthesis
碩士 === 中原大學 === 電子工程研究所 === 97 === With the integrated circuit process technology advances, the process scale has now entered the deep sub-micron nano-meter regime. In a synchronous sequential circuit, the clock signal is the most active signal in the circuit. In the entire chip, the power consumpti...
Main Authors: | Wen-Pin Tu, 涂雯斌 |
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Other Authors: | Shih-Hsu Huang |
Format: | Others |
Language: | zh-TW |
Online Access: | http://ndltd.ncl.edu.tw/handle/73180420763631675135 |
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