Turbo Decoder Design Employing New Phase Estimation Hard Decision Stop Criterion Method

• Main Authors: Yao-Chang Chang, 張瑤璋
• Other Authors: 李文達
• Format: Others
• Language: zh-TW
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/6abf24

碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 97 === In this thesis, we proposed one high efficient stop criterion method for turbo decoder VLSI design with measurement in phase stage. The new stop criterion algorithm is based on Hard Decision Aided(HAD) stop criterion algorithm, and used phase estimation method to reduce iteration and thus improve turbo decoder latency efficiency. In high SNR environment, the iteration number of proposed algorithm is less than traditional stop criterion algorithm. Moreover, in best situation, our proposed algorithm needs only one iteration operation, and the error correction ability is almost the same with traditional algorithm. In low SNR environment, the proposed algorithm can detect the damage degree of received data whether it is out of the error correct ability of turbo decoder. And then it can stop iteration operation early to reduce operation time and power consumption. Finally, this new phase estimation hard decision stop criterion turbo decoder has been designed with TSMC 0.18μm 1P6M process to accomplish. The decoder chip size is 1530μm x 1504μm, operation frequency is 48MHz.