Fast Phase Tracking and High Frequency Multiplication Factor All-Digital Phase-Locked Loop and Its Applications
碩士 === 國立中正大學 === 資訊工程所 === 98 === An All-Digital Phase-Locked Loop (ADPLL) for video capture application is presented in this dissertation. The major function of this ADPLL is to generate the high speed pixel clock from the horizontal synchronization signal (HSYNC) of the Person Computer (PC) graph...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/91419033887713251833 |