A Design Partitioning Approach for Three Dimensional Integrated Circuits
碩士 === 中原大學 === 電子工程研究所 === 98 === As the technology progresses, interconnect delays have become bottlenecks of chip performance. Three dimensional integration circuits (3D ICs) technologies can help to improve circuit performance and reduce power consumption by shortening wirelength. In 3D IC, thro...
Main Authors: | Hua-Hsin Yeh, 葉驊昕 |
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Other Authors: | Shih-Hsu Huang |
Format: | Others |
Language: | zh-TW |
Published: |
2010
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Online Access: | http://ndltd.ncl.edu.tw/handle/vn227t |
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