An Approach for Floorplanning Massive Modules Based on CUDA Architecture
碩士 === 國立臺北科技大學 === 電機工程系研究所 === 100 === The methods to represent a floorplan of VLSI can be classified as slicing and non-slicing. The non-slicing method can express slicing structure as well as non-slicing structure while the slicing method can express slicing structure only. However, there are re...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/e9matk |