Elastic Superposition Mapping for Heterogeneous Tasks in Reconfigurable Multicore Architecture

• Main Authors: Chien-Yu Wang, 王健宇
• Other Authors: Pao-Ann Hsiung
• Format: Others
• Language: en_US
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/98341348470343638937

碩士 === 國立中正大學 === 資訊工程研究所 === 102 === With technology improvement, more and more applications are being integrated into a single chip, which requires a large number of processing elements (PE) in a system such that computation can be effectively enhanced through parallel processing. However, the PEs are often inter-connected by a conventional bus that becomes a communication bottleneck. To support more efficient parallel processing, the Network-on-Chip (NoC) is increasing being adopted as a new alternative interconnection architecture. Nevertheless, NoC has presented new challenges, including mapping tasks to the PEs in reconfigurable heterogeneous CPU/GPU multicore architecture, which has become an increasingly important issue. Region-based allocation of PE results in internal fragmentation, and non-region based allocation results in external fragmentation. To address this issue and to overcome the problems in state-of-the-art task mapping methods, we propose a novel Elastic Superposition Mapping (ESM) that introduces a useful PE reservation heuristic along with dynamic cross-application superposition. ESM can provide a great elasticity for NoC to map more applications. Thus, the task load on PE will increase. Experiments show that compared with state-of-the-art region-based mapping, 7% to 49% more applications can be executed; the average task load on PE can be increased by 5.5% to 56%; and the application waiting time can be reduced by 11% to 54%.