Formation of self-organized Ge quantum dots/SiO2/silicon heterostructures with interface engineering

碩士 === 國立中央大學 === 電機工程學系 === 101 === In this thesis, we demonstrated a novel method for the fabrication of a designer Ge quantum dot (QD)/SiO2/Si heterostructure by selectively oxidizing poly-Si0.83Ge0.17 nano-pillars over buffer layers of Si3N4 that were deposited over Si substrates. The formation...

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Bibliographic Details
Main Authors: Ting-chia Hsu, 許庭嘉
Other Authors: Pei-wen Li
Format: Others
Language:zh-TW
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/18936510872986435531
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Summary:碩士 === 國立中央大學 === 電機工程學系 === 101 === In this thesis, we demonstrated a novel method for the fabrication of a designer Ge quantum dot (QD)/SiO2/Si heterostructure by selectively oxidizing poly-Si0.83Ge0.17 nano-pillars over buffer layers of Si3N4 that were deposited over Si substrates. The formation of Ge QDs was realized by thermally oxidizing the SiGe pillar through the preferential oxidation of Si, the segregation of released Ge to be incorporated within the as-yet unoxidized SiGe grains, and ultimately the Ostwald ripening of the Ge QD. Attendant to the formation of Ge QDs, catalytically-enhanced local oxidation of Si3N4 by Ge QD itself also facilitates the QD penetration through Si3N4, ultimately leading to the QDs in contact with the underlying Si substrate. An approximately 4-nm-thick interfacial layer of oxide was observed at the interface of Ge QD/Si substrate in conjunction with the presence of a 3-5 nm SiGe intermixing shell at the interface of Si substrate, generating a self-organized Ge QD/SiO2/Si heterostructure. Thereby we are able to not only create an entirely new heterostructure interface with the Si substrate, but also grow superior SiO2 directly over Ge. Ge QD experiences compressive strain from the Si substrate, and Raman characterization reveals that the compressive stress is much enhanced with a reduction in the QD size. The interfacial quality of the Ge QD/SiO2/Si heterstructure is further characterized on a metal-oxide-semiconductor (MOS) diode. The extracted interface trap density (Dit) from temperature-dependent high- and low-frequency capacitance-voltage (C-V) characteristics was about 2×1011 cm-2eV-1, indicating the high quality of the SiO2/Ge QD interface being favorable for the realization of Ge MOS devices with good oxide integrity.