Using the Gate-Diffusion Input Technique for Low Power Programmable Logic Array Design
碩士 === 國立彰化師範大學 === 資訊工程學系 === 101 === Because of the dynamic PLA structure has predictable routing delay and high speed, the PLA structure is usually built using combinational and sequential circuits in digital systems. But the trend of system on chip (SOC) today, the complexity of the control cir...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/49456544965198219104 |