28nm 36Kb High Speed 6T SRAM Macro Design with Source Follower PMOS Read and Bit-Line Under-Drive
碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 103 === Static Random Access Memory (SRAM) has been widely used in the System on Chip (SOC) design because of its high operating speed and high performance. Traditional 6T SRAM bitcell becomes the mainstream due to its small area. Many SRAM designs adopt traditiona...
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| Format: | Others |
| Language: | en_US |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/79002116358137982921 |