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碩士 === 國立中央大學 === 電機工程學系 === 103 === This study focuses on the fabrication and characterization of AlN/AlGaN/AlN/GaN HEMTs on high-resistivity Si(111)substrate. The thermal oxidation is proposed before gate dielectric deposition to achieve the high quality gate dielectric and lower interface state...
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ndltd-TW-103NCU054420752016-08-17T04:23:14Z http://ndltd.ncl.edu.tw/handle/11117312024146350588 none 氮化鋁鎵/氮化鎵高電子遷移率場效電晶體之表面氮化鋁氧化研究 Chen-ting Chiang 江承庭 碩士 國立中央大學 電機工程學系 103 This study focuses on the fabrication and characterization of AlN/AlGaN/AlN/GaN HEMTs on high-resistivity Si(111)substrate. The thermal oxidation is proposed before gate dielectric deposition to achieve the high quality gate dielectric and lower interface state density. To discuss the impact of the high temperature oxidation process, we fabricated the metal-oxide-semiconductor capacitor (MOS capacitor) with 10 nm Al2O3 gate dielectrics with thermal oxidation process. The thermal oxidation process was in O2 ambient at 900 C for 2、3.5、5 minutes before the gate dielectrics deposition, followed by post-deposition annealing(in N2 ambient at 450 C). When MOS capacitors were reverse-biased, the MOS capacitor with thermal oxidation showed the lowest gate leakage current about 10-6 A/cm2, which is lower than the MOS capacitor without thermal oxidation by twofold. From capacitance–voltage measurement results, device with thermal oxidation process shows the lower dispersion between different measurement frequencies. The MOS capacitor with thermal oxidation process show the improvement on the interface state density between gate insulator and semiconductor. The interface state density is reduced to about 1012~1013 cm-2eV-1. Comparing the influence about thermal oxidation process on MOS-HEMT. Devices with thermal oxidation process show reduction in the gate leakage current, and the interface state density. However, device with thermal oxidation process showed the lower buffer breakdown voltage. In addition, dynamic resistances of the devices were analyzed with different kinds of quiescent bias. When drain quiescent bias is below 30V, the device with the thermal oxidation shows lower dynamic on-resistance to steady-state on-resistance ratio. When drain quiescent bias is High than 30 V, the device with the thermal oxidation shows the higher dynamic on-resistance to steady-state on-resistance ratio. The experimental results showed that the dynamic resistance is not only dominated by the interface density, but also affected by the buffer defects at high electric field. Yue-ming Hsin 辛裕明 2015 學位論文 ; thesis 74 zh-TW |
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碩士 === 國立中央大學 === 電機工程學系 === 103 === This study focuses on the fabrication and characterization of AlN/AlGaN/AlN/GaN HEMTs on high-resistivity Si(111)substrate. The thermal oxidation is proposed before gate dielectric deposition to achieve the high quality gate dielectric and lower interface state density.
To discuss the impact of the high temperature oxidation process, we fabricated the metal-oxide-semiconductor capacitor (MOS capacitor) with 10 nm Al2O3 gate dielectrics with thermal oxidation process. The thermal oxidation process was in O2 ambient at 900 C for 2、3.5、5 minutes before the gate dielectrics deposition, followed by post-deposition annealing(in N2 ambient at 450 C). When MOS capacitors were reverse-biased, the MOS capacitor with thermal oxidation showed the lowest gate leakage current about 10-6 A/cm2, which is lower than the MOS capacitor without thermal oxidation by twofold. From capacitance–voltage measurement results, device with thermal oxidation process shows the lower dispersion between different measurement frequencies. The MOS capacitor with thermal oxidation process show the improvement on the interface state density between gate insulator and semiconductor. The interface state density is reduced to about 1012~1013 cm-2eV-1.
Comparing the influence about thermal oxidation process on MOS-HEMT. Devices with thermal oxidation process show reduction in the gate leakage current, and the interface state density. However, device with thermal oxidation process showed the lower buffer breakdown voltage.
In addition, dynamic resistances of the devices were analyzed with different kinds of quiescent bias. When drain quiescent bias is below 30V, the device with the thermal oxidation shows lower dynamic on-resistance to steady-state on-resistance ratio. When drain quiescent bias is High than 30 V, the device with the thermal oxidation shows the higher dynamic on-resistance to steady-state on-resistance ratio. The experimental results showed that the dynamic resistance is not only dominated by the interface density, but also affected by the buffer defects at high electric field.
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Yue-ming Hsin |
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Yue-ming Hsin Chen-ting Chiang 江承庭 |
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Chen-ting Chiang 江承庭 |
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Chen-ting Chiang 江承庭 none |
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Chen-ting Chiang |
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http://ndltd.ncl.edu.tw/handle/11117312024146350588 |
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