Research on Delay Line Technology Applied to MEMS Analog to Digital Converter

• Main Authors: Ke, Jun-De, 柯俊德
• Other Authors: Shen, Chih-Hsiung
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/13719813637203282031

碩士 === 國立彰化師範大學 === 機電工程學系所 === 104 === With the development of micro-electromechanical systems, there are more functions in the chip. In microelectromechanical systems, the micro structure will be designed in various ways to produce the sensing signal to the electronic circuit. The sensing signals in the MEMS structure are very small, so that the signal will be magnified for the circuit can readout. Unlike general-purpose Vernier delay line, we use a voltage controlled delay element to compose Vernier delay line. We use Vernier delay line timing technology to achieve analog to digital conversion. In this study, we propose a novel Vernier delay line Analog-to-Digital Converter(ADC). The voltage controlled delay element changes its delay time by sensing signal. The Vernier delay line which consists of voltage controlled delay elements can converted the variation of delay time into digital signal. The simulation analysis shows that Vernier delay line ADC’s voltage measurement range is 0.272 ~ 15mV, and resolution is 2.11 ~ 248.9μV. The advantage of novel Vernier delay line ADC is flexible. We can adjust the measurement range and resolution according to the measurement requirements.