Two-Stage Multi-bit Flip-Flop Clustering for Low Power
碩士 === 中原大學 === 電子工程研究所 === 106 === As the advancement of modern technology, electronic products highly require good performance. Accelerate the execution speed of a chip design is a very important issue. The utilization of clock skew in the circuit can be seen as a part of the improvement. In order...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/977t85 |