Test and Diagnosis Methodology for Various Fault Models in Logic Circuits

博士 === 國立成功大學 === 電機工程學系 === 106 === With the shrinking manufacturing process and increasing design complexity, the defect behaviors in contemporary integrated circuits have become much more complex than ever. It is generally realized that the test set for a simple, single fault model such as the st...

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Bibliographic Details
Main Authors: Cheng-HungWu, 吳政鴻
Other Authors: Kuen-Jong Lee
Format: Others
Language:en_US
Published: 2018
Online Access:http://ndltd.ncl.edu.tw/handle/se3vxu