Implementation of a new 2-bit non-volatile memory cell with a stepped gate structure
碩士 === 國立清華大學 === 電子工程研究所 === 106 === abstract hide
Main Authors: | Yang, Tsung-Yu, 楊宗祐 |
---|---|
Other Authors: | Hsu, Yung-Jane |
Format: | Others |
Language: | zh-TW |
Published: |
2017
|
Online Access: | http://ndltd.ncl.edu.tw/handle/xs9phg |
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