Time-Domain Sigma Delta Smart Temperature Sensor
碩士 === 國立臺灣科技大學 === 電子工程系 === 106 === This thesis provides a new concept of implementing oscillator-based time-domain sigma delta smart temperature sensor. The time-domain sigma delta modulator converts the temperature-sensitive frequency into 1-bit data stream corresponding to the test temperature....
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ndltd-TW-106NTUS54280382019-05-16T00:15:36Z http://ndltd.ncl.edu.tw/handle/r2z3c8 Time-Domain Sigma Delta Smart Temperature Sensor 時域三角積分智慧型溫度感測 Sapta Setiawan 方萬信 碩士 國立臺灣科技大學 電子工程系 106 This thesis provides a new concept of implementing oscillator-based time-domain sigma delta smart temperature sensor. The time-domain sigma delta modulator converts the temperature-sensitive frequency into 1-bit data stream corresponding to the test temperature. Relaxation oscillator is utilized to generate PTAT, CTAT, and temperature compensated frequencies for the modulator. Two versions of smart temperature sensor are designed. The first version implements two separated PTAT and CTAT temperature-sensitive oscillators to generate frequency dependent signal. The second version combines both PTAT and CTAT oscillators into one to share most of the circuit area and reduce the impact of process variation. The third-order gradient error cancellation layout pattern is applied in the sensor layout to match the critical devices. Both versions of the smart temperature sensor are drawn side by side in the chip during layout for a fair performance comparison. The design is implemented in a TSMC 0.25m standard CMOS process. Post-layout simulation result shows that the duty cycle of the output bit stream changes proportionally to the temperature variation. The total chip area is 0.99503×0.99503mm2 and 0.375mW power consumption at 2.5V supply voltage. Poki Chen 陳伯奇 2018 學位論文 ; thesis 76 en_US |
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碩士 === 國立臺灣科技大學 === 電子工程系 === 106 === This thesis provides a new concept of implementing oscillator-based time-domain sigma delta smart temperature sensor. The time-domain sigma delta modulator converts the temperature-sensitive frequency into 1-bit data stream corresponding to the test temperature. Relaxation oscillator is utilized to generate PTAT, CTAT, and temperature compensated frequencies for the modulator. Two versions of smart temperature sensor are designed. The first version implements two separated PTAT and CTAT temperature-sensitive oscillators to generate frequency dependent signal. The second version combines both PTAT and CTAT oscillators into one to share most of the circuit area and reduce the impact of process variation. The third-order gradient error cancellation layout pattern is applied in the sensor layout to match the critical devices. Both versions of the smart temperature sensor are drawn side by side in the chip during layout for a fair performance comparison. The design is implemented in a TSMC 0.25m standard CMOS process. Post-layout simulation result shows that the duty cycle of the output bit stream changes proportionally to the temperature variation. The total chip area is 0.99503×0.99503mm2 and 0.375mW power consumption at 2.5V supply voltage.
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Poki Chen |
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Poki Chen Sapta Setiawan 方萬信 |
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Sapta Setiawan 方萬信 |
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Sapta Setiawan 方萬信 Time-Domain Sigma Delta Smart Temperature Sensor |
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Sapta Setiawan |
title |
Time-Domain Sigma Delta Smart Temperature Sensor |
title_short |
Time-Domain Sigma Delta Smart Temperature Sensor |
title_full |
Time-Domain Sigma Delta Smart Temperature Sensor |
title_fullStr |
Time-Domain Sigma Delta Smart Temperature Sensor |
title_full_unstemmed |
Time-Domain Sigma Delta Smart Temperature Sensor |
title_sort |
time-domain sigma delta smart temperature sensor |
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2018 |
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http://ndltd.ncl.edu.tw/handle/r2z3c8 |
work_keys_str_mv |
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