Design of the Ripple-Based Constant On-Time Controlled Buck Converters
碩士 === 國立臺灣大學 === 電子工程學研究所 === 107 === Power management IC (PMIC) is a critical building block in integrated circuits for providing stable supply voltages. Two DC-DC converters are implemented and verified in this thesis. The first work verifies that the ripple-based constant on-time controlled buck...
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ndltd-TW-107NTU054280282019-06-27T05:48:11Z http://ndltd.ncl.edu.tw/handle/u843y7 Design of the Ripple-Based Constant On-Time Controlled Buck Converters 漣波控制固定導通時間降壓轉換器之設計 Tzu-Hsuan Yang 楊子玄 碩士 國立臺灣大學 電子工程學研究所 107 Power management IC (PMIC) is a critical building block in integrated circuits for providing stable supply voltages. Two DC-DC converters are implemented and verified in this thesis. The first work verifies that the ripple-based constant on-time controlled buck converter under light load condition has the characteristic of pulse frequency modulation (PFM). With this merit it can improve the efficiency. This work steps down the input voltage 3.3 V to the output voltage is 1.2 V and realizes with 1 μH inductor and 4.7 μF capacitor. The switching frequency is 2.5 MHz. The maximum output current is 1.7 A. The maximum efficiency is 90.4 %. Comparing with the efficiency of the constant frequency control, our work can improve the efficiency from 70.3 % to 76.4 %. The second work improves the problems of output voltage ripple in the first work and implements an EMI reduction on-time generator. The output power spectral density will not affect the back-end circuit through the electromagnetic interference. This work utilizes the multi-layer ceramic capacitor as the output capacitor. Even the value of parasitic resistance is small. The system can be stable by using current feedback loop. By using the voltage square feedback path, this converter eliminates the inherent dc offset voltage in the ripple-based constant on-time control. This work is realized with 1 μH inductor and 4.7 μF capacitor. The input voltage is 3.3 V and the output voltage is 1.2 V. The maximum output current is 1.7 A. The maximum efficiency is 89.13 %. The output ripple is 10 mV in constant frequency mode. The switching frequency is operated between 2.5 MHz to 5.5 MHz. Comparing with the constant frequency operation the output power spectral density of spread spectrum mode can be reduced 20.73 dB. Tsung-Hsien Lin 林宗賢 2018 學位論文 ; thesis 102 en_US |
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碩士 === 國立臺灣大學 === 電子工程學研究所 === 107 === Power management IC (PMIC) is a critical building block in integrated circuits for providing stable supply voltages. Two DC-DC converters are implemented and verified in this thesis.
The first work verifies that the ripple-based constant on-time controlled buck converter under light load condition has the characteristic of pulse frequency modulation (PFM). With this merit it can improve the efficiency. This work steps down the input voltage 3.3 V to the output voltage is 1.2 V and realizes with 1 μH inductor and 4.7 μF capacitor. The switching frequency is 2.5 MHz. The maximum output current is 1.7 A. The maximum efficiency is 90.4 %. Comparing with the efficiency of the constant frequency control, our work can improve the efficiency from 70.3 % to 76.4 %.
The second work improves the problems of output voltage ripple in the first work and implements an EMI reduction on-time generator. The output power spectral density will not affect the back-end circuit through the electromagnetic interference. This work utilizes the multi-layer ceramic capacitor as the output capacitor. Even the value of parasitic resistance is small. The system can be stable by using current feedback loop. By using the voltage square feedback path, this converter eliminates the inherent dc offset voltage in the ripple-based constant on-time control. This work is realized with 1 μH inductor and 4.7 μF capacitor. The input voltage is 3.3 V and the output voltage is 1.2 V. The maximum output current is 1.7 A. The maximum efficiency is 89.13 %. The output ripple is 10 mV in constant frequency mode. The switching frequency is operated between 2.5 MHz to 5.5 MHz. Comparing with the constant frequency operation the output power spectral density of spread spectrum mode can be reduced 20.73 dB.
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Tsung-Hsien Lin |
author_facet |
Tsung-Hsien Lin Tzu-Hsuan Yang 楊子玄 |
author |
Tzu-Hsuan Yang 楊子玄 |
spellingShingle |
Tzu-Hsuan Yang 楊子玄 Design of the Ripple-Based Constant On-Time Controlled Buck Converters |
author_sort |
Tzu-Hsuan Yang |
title |
Design of the Ripple-Based Constant On-Time Controlled Buck Converters |
title_short |
Design of the Ripple-Based Constant On-Time Controlled Buck Converters |
title_full |
Design of the Ripple-Based Constant On-Time Controlled Buck Converters |
title_fullStr |
Design of the Ripple-Based Constant On-Time Controlled Buck Converters |
title_full_unstemmed |
Design of the Ripple-Based Constant On-Time Controlled Buck Converters |
title_sort |
design of the ripple-based constant on-time controlled buck converters |
publishDate |
2018 |
url |
http://ndltd.ncl.edu.tw/handle/u843y7 |
work_keys_str_mv |
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