Techniques for VLSI Circuit Optimization Considering Process Variations
Technology scaling has increased the transistor's susceptibility to process variations in nanometer very large scale integrated (VLSI) circuits. The effects of such variations are having a huge impact on performance and hence the timing yield of the integrated circuits. The circuit optimization...
Main Author: | |
---|---|
Format: | Others |
Published: |
Scholar Commons
2009
|
Subjects: | |
Online Access: | https://scholarcommons.usf.edu/etd/66 https://scholarcommons.usf.edu/cgi/viewcontent.cgi?article=1065&context=etd |