A 16-b 10Msample/s Split-Interleaved Analog to Digital Converter
"This work describes the integrated circuit design of a 16-bit, 10Msample/sec, combination ‘split’ interleaved analog to digital converter. Time interleaving of analog to digital converters has been used successfully for many years as a technique to achieve faster speeds using multiple iden...
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Others |
| Published: |
Digital WPI
2007
|
| Subjects: | |
| Online Access: | https://digitalcommons.wpi.edu/etd-theses/974 https://digitalcommons.wpi.edu/cgi/viewcontent.cgi?article=1973&context=etd-theses |