Showing 1 - 16 results of 16 for search 'DIGITAL INTEGRATED CIRCUIT DESIGN', query time: 0.88s Refine Results
  1. 1
    by Kai-Wei Hong, 洪凱尉
    Published 2011
    ... synchronous mirror delay (CSMD) circuit is a kind of digital clock synchronization circuits. The CSMD circuit...
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  2. 2
    by Chen-Lung Wu, 伍振龍
    Published 2006
    ...碩士 === 國立中央大學 === 電機工程研究所 === 94 === In view of the current SOC systems, a great deal of circuits...
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  3. 3
    by Yin-ping Yeh, 葉蔭平
    Published 2012
    ... synchronization circuit plays an important role in designing SoC system. Phase-Locked loop (PLL) and delay-locked...
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  4. 4
    by Chan-Wei Huang, 黃展緯
    Published 2006
    ..., the vernier delay line circuit has high circuit resolution but high chip area. In this all digital CMOS self...
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  5. 5
    by Wei-Bin Yang, 楊維斌
    Published 2003
    ... power distribution networks are important for high-speed deep submicrometer CMOS integrated circuits...
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  6. 6
    by Ta-Wei Liu, 劉大維
    Published 2002
    ... circuit. However, resistors and capacitors in the integrated circuits have great variation...
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  7. 7
    by Shu-Yu Jiang, 江書育
    Published 2003
    ...-locked loop design. Another is the built-in jitter test technique design. In PLL circuit design, the half...
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  8. 8
    by Chi-Che Chen, 陳麒哲
    Published 2002
    ... performance, it is gaining more interests in analog circuit design. Also, current-mode circuit takes lower...
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  9. 9
    by Lin-Jiunn Tzou, 鄒林俊
    Published 2000
    ... field of integrated circuits. Phase-locked loop is generally used in clock recovery of communication...
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  10. 10
    by Ching-Wen Lai, 賴敬文
    Published 2005
    ... integrated (VLSI) circuit increases fast, there are more and more transistors in the unit area, because...
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  11. 11
    by Wen-Fang Yu, 游文芳
    Published 2004
    ... system has forced to design the total digital circuit, but we actually are living in the analogy world...
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  12. 12
    by Yu-Fen Lin, 林鈺芬
    Published 2008
    ...-circuit of integrate system. In this thesis, a fast locking self-calibration PLL is proposed. It can...
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  13. 13
    by Fang-Ying Su, 蘇芳瑩
    Published 2008
    ... trend of VLSI circuit is System-on-Chip (SOC). When many systems were integrated into a chip, the system...
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  14. 14
    by HSIN-HAO WANG, 王信濠
    Published 2008
    ... operation. At the same time the SoC era continuously goes on, integrating digital-to-analog converter (DAC...
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  15. 15
    by Chun-Pin Lin, 林俊賓
    Published 2000
    ... on the compression standards of JPEG and MPEG. DCT can be implemented to integration circuits thanks to mature...
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  16. 16
    by Yu-Kwang Yeha, 葉昱崑
    Published 1995
    ... be adopted to the design of high perfor- mance digital processing systems...
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