“...碩士 === 國立成功大學 === 電機工程學系碩博士班 === 91 === This thesis presents an investigation of the design...”
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“... distortions resulted from process mismatches with its simple circuit design. BM rotated walk layout technique...”
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“...博士 === 國立成功大學 === 電機工程學系碩博士班 === 101 === Current-Steering Digital-to-Analog Converters (DACs...”
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“...mm2. Post-layout simulation demonstrates that the ADC can digitize an input 30MHz with 7.5 effective...”
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“... is designed to increase conversion speed and reduce noise. The post-layout simulation shows that it can...”
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