Showing
1 - 1
results of
1
for search '
DIGITAL LOGIC DESIGN WITH HDL
'
Skip to content
Home
High Impact Articles
Search Options
UiTM Open Access
Search by UiTM Scopus
Advanced Search
Search by Category
Discovery Service
Sources
Jawi Collection
UiTM Journals
List UiTM Journal in IR
Statistic
About
Open Access
Creative Commons Licenses
COKI | Malaysia Open Access
Report Technical
User Guide
Contact Us
Search Tips
FAQs
All Fields
Title
Author
Subject
Call Number
ISBN/ISSN
Tag
Find
Advanced
Reset Filters
Language:
deu
Reset Filters
Show filters (1)
Language:
deu
Search Results - DIGITAL LOGIC DESIGN WITH HDL
Showing
1 - 1
results of
1
for search '
DIGITAL LOGIC DESIGN WITH HDL
'
, query time: 2.73s
Refine Results
Sort
Relevance
Date Descending
Date Ascending
Call Number
Author
Title
1
Implementation and modeling of parametrizable high-speed Reed Solomon decoders on FPGAs
by
A. Flocke
,
H. Blume
,
T. G. Noll
Published 2005-01-01
“
...One of the most important error correction codes in
digital
signal processing is the Reed Solomon...
”
Get full text
Article
Search Tools:
Get RSS Feed
—
Email this Search
Back
Narrow Search
Format
Article
1
Sources
DOAJ
1
Collections
DOAJ
1
Author
A. Flocke
1
H. Blume
1
T. G. Noll
1
Language
deu
Year of Publication
From:
To:
Loading...