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  1. 1
    Design for testability method at register transfer level
    by Paraman, Norlina
    Published 2016
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    Thesis
  2. 2
    Study and design of an ultrasonic flow tomographic front-end multi level measurement system
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    Article
  3. 3
    Register-transfer level design of sum of absolute transformed difference for high efficiency video coding
    by Heh, Whit Ney
    Published 2018
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    Thesis
  4. 4
    Register transfer level design of compression processor core using verilog hardware description language
    by Mohd. Sabri, Roslee
    Published 2007
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    Thesis
  5. 5
    System-on-chip (SoC) testing using adhoc high-level design for-testability method
    by Cheng, Chen Kong
    Published 2009
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    Thesis
  6. 6
    ASIC design of natural frequency of ECG signal for atrial fibrillation detection module using high-level synthesis approach
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    Article
  7. 7
    Scalable multicore design for test interface design
    by Chong, Shi Hou
    Published 2007
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    Thesis
  8. 8
    High level dataflow network partitioning using stochastic algorithms
    by Woo, Yit Weng
    Published 2018
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    Thesis
  9. 9
    Asic design for healthiness recognition of agriculture
    by Chin, Linn Kern
    Published 2020
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    Thesis
  10. 10
    Dataset generation and network intrusion detection based on flow-level information
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    Thesis
  11. 11
    Face detection hardware accelerator using C-based high-level synthesis
    by Yeap, Han Chien
    Published 2018
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    Thesis
  12. 12
    Overview on design considerations for development of disposable microbiorector prototypes
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    Article
  13. 13
    The design and verification of malay text to speech synthesis system
    by Tan, Tian Swee
    Published 2004
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    Thesis
  14. 14
    Design of current control mode for wind turbine application
    by Hussin, Siti Maherah
    Published 2011
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    Thesis
  15. 15
    Enhancement of cascaded multi-level VSC statcom performance using ANN in the presence of faults
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    Article
  16. 16
    Verilog design of input/output processor with built-in-self-test
    by Goh, Keng Hoo
    Published 2007
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    Thesis
  17. 17
    Exploring the design space of HEVC inverse transforms with dataflow programming
    by Yion, K. Z., Rahman, A. A. H. A.
    Published 2017
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    Article
  18. 18
    Design of tunable differential transconductance-capacitance low pass filter
    by Wong, Kam Yee
    Published 2009
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    Thesis
  19. 19
    Design and implementation of predictive control for networked multi-process systems
    by Mohd. Subha, Nurul Adilla
    Published 2016
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    Thesis
  20. 20
    Correlation between reflection coefficient, dielectric properties and brix level of malaysian oranges at microwave frequencies
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    Article
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