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  1. 1
    The RTL design of 32-bit RISC processor using verilog HDL
    by Manab, Hafizul Hasni
    Published 2012
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    Thesis
  2. 2
    Development of single board computer based on 32-bit 5-stage pipeline RISC processor
    by Koay, Boon Wooi
    Published 2009
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    Thesis
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