“...碩士 === 國立臺灣科技大學 === 工程技術研究所 === 81 === In this thesis, we present a VLSI...”
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“...碩士 === 國立臺灣科技大學 === 工程技術研究所 === 81 === In this thesis, we present a VLSI...”
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“...碩士 === 國立臺灣科技大學 === 工程技術研究所 === 81 === In this thesis we present a VLSI architecture...”
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“..., a VLSI architecture and chip have been designed for computing UEDSWA...”
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“... computational bottleneck. This processor is based on a VLSI array processing chip which has been designed...”
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“... the application of dynamic space warping VLSI chip, OOP(Object OrientedProgramming)-based system design technology...”
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