Showing 1 - 15 results of 15 for search 'VLSI SYSTEM DESIGN', query time: 0.96s Refine Results
  1. 1
    Error concealment algorithm and VLSI chip design for MPEG decoding system
    by Shih-Wen Chou, 周世文
    Published 2003
    “..., the unavoidable bit-stream error or packet loss causes the image corrupted. The error concealment of video system...”
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  2. 2
    VLSI Design of an Interleaver for OFDM
    by Chun-Yu Ling, 凌君瑜
    Published 2004
    “...) technology has attracted attention in wireless communications system. Due to that OFDM is a multi-carrier...”
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  3. 3
    A VLSI Design of RRO-NRDPWT-Based ECG Data Compress System
    by Wen-Wei GAU, 高文偉
    Published 2010
    “... control. For design the VLSI architecture of the ECG compression system, this paper modifies the original...”
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  4. 4
    VLSI Design of an IFFT Processor for OFDM
    by Chien-Ming Chen, 陳建名
    Published 2004
    “... implement using VLSI technology, the aim of this research is to design architecture effective reducing...”
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  5. 5
    The Study and VLSI Design of 2-D Discrete Cosine Transform Based on Residue Number System
    by Guo-En Yan, 顏國恩
    Published 2006
    “... on residue number system (RNS). The <2n-3,2n-1,2n+1,2n+3> moduli set is used to design the hardward...”
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  6. 6
    VLSI Design of a Timing and Frequency Synchronization Processor for OFDM
    by Han-Te Li, 李瀚德
    Published 2004
    “... offset of OFDM symbol and accomplished synchronization. In the circuit design, we used VHDL to build...”
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  7. 7
    A Recursive Based VLSI Design for Direct Digital Frequency Synthesizer
    by Yu-Ting Shih, 施侑廷
    Published 2003
    “..., an efficient VLSI architecture design for direct digital frequency synthesizer algorithm is proposed based...”
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  8. 8
    The Residue VLSI Architecture Design For JPEG2000 Lifting-based Forward/Backward DWT
    by Yung-tai Chen, 陳雍岱
    Published 2003
    “... is obtained by our 1-D Lifting-based DWT. The residue number system has carry-free and high parallel property...”
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  9. 9
    High Performance Linear Convolution Design and VLSI Implementation Based on Conjugate Polynomial Channel PRNS
    by Shyue-Wen Yang, 楊學雯
    Published 2004
    “....　In general, large word length leads to decay the performance of the system. Because of the carry propagation...”
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  10. 10
    Fast RSA Cryptography System Design Based on Double Base Number System
    by Kun-Yan Liu, 劉坤晏
    Published 2004
    “... Binary-to-DBNS conversion approach and hardware design. In DBNS system, the input binary number...”
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  11. 11
    The Real-time System Design of Video De-interlacing and Digital Image Scaling
    by Chung-chi Lin, 林正基
    Published 2009
    “...-interlacing technique with scene change detection and its VLSI architecture design is proposed. Most of de...”
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  12. 12
    Algorithms and Chip Design for Video Moving Object Segmentation in Fixed Video Camera
    by Cheng-Hung Hsiao, 蕭政弘
    Published 2003
    “... for the next generation system. Video segmentation is a very important unit. In this thesis, a new moving...”
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  13. 13
    Digital Image Interface for Multi-Display Systems
    by Dung-Han Ho, 何東翰
    Published 2006
    “...碩士 === 國立中正大學 === 電機工程所 === 94 === This thesis proposes the interfaces of display system including...”
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  14. 14
    Development of High-light LED Display System with Embedded Micro-controller
    by Tai-Lai Wang, 王泰來
    Published 2005
    “...碩士 === 國立中正大學 === 電機工程所 === 93 === This thesis proposes an embedded micro-controller design on FPGA...”
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  15. 15
    On-Chip High Resolution Jitter Measurement Circuit for 6 GHz Clock Generator
    “...碩士 === 國立中央大學 === 電機工程研究所 === 97 === As the improvement of semiconductor technology, VLSI circuit...”
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