McNeill, N., Vozikis, D., Peña-Alzola, R., Wang, S., Pollock, R., Holliday, D., & Williams, B. W. (2023, January). Gate Driver Circuit with All-Magnetic Isolation for Cascode-Connected SiC JFETs in a Three-Level T-Type Bridge-Leg. Energies.
Chicago Style (17th ed.) CitationMcNeill, Neville, Dimitrios Vozikis, Rafael Peña-Alzola, Shuren Wang, Richard Pollock, Derrick Holliday, and Barry W. Williams. "Gate Driver Circuit with All-Magnetic Isolation for Cascode-Connected SiC JFETs in a Three-Level T-Type Bridge-Leg." Energies Jan. 2023.
MLA (9th ed.) CitationMcNeill, Neville, et al. "Gate Driver Circuit with All-Magnetic Isolation for Cascode-Connected SiC JFETs in a Three-Level T-Type Bridge-Leg." Energies, Jan. 2023.
Warning: These citations may not always be 100% accurate.
